1. Field of the Invention
The present invention relates to a semiconductor device carrying a semiconductor chip and a circuit board advantageously used in such a device.
2. Description of the Related Art
A semiconductor chip carried on a semiconductor device has electrode terminals of which the number has recently increased because of the number of functions added to the semiconductor device. Accordingly, a method has often been used wherein the electrode terminals are formed on an electrode terminal-forming surface of the semiconductor chip in an "area-array" manner, and the semiconductor chip is mounted onto the circuit board by a flip-chip connection. According to the flip-chip connection, bumps formed on the electrode terminals are bonded to pads of the circuit board to electrically connect the electrode terminals with external connection terminals provided on the circuit board.
FIG. 10 illustrates a conventional semiconductor device comprising a semiconductor chip 10 mounted on a circuit board 5 and having electrode terminals 8 arranged in an area-array manner. Reference numeral 6 denotes a build-up layer formed on each of opposite sides of the circuit board 5, and 7 denotes an external connection terminal. The semiconductor chip 10 is electrically connected to a circuit pattern (not shown) provided in the build-up layer 6 and electrically connected to the external connection terminal 7. The build-up layer 6 is formed as a multi-layered structure for the purpose of forming circuit patterns for electrically connecting electrode terminals 8 of the semiconductor chip with external terminals. Reference numeral 9 denotes a resin for shielding the semiconductor chip 10.
The build-up layer 6 is formed of electro-insulation substrates, for example, of epoxy or polyimide, each of which carries a circuit pattern and is sequentially added while electrically connecting the circuit patterns with each other. Therefore, there are drawbacks in this arrangement in that, although it is suitable for a high-density wiring, a multi-layered structure is difficult to assuredly obtain, the manufacturing cost is high, the reliability is low, and the yield is low.